This set covers the arithmetic and instruction-level basics of Computer Organization: number conversions, signed representations, IEEE 754, Booth's algorithm, instruction formats and addressing modes. It is useful for GATE, university exams and placement aptitude rounds, and each answer comes with a short worked explanation.
How to practise: read each question and tap the option you think is correct. You will see right away whether you got it, along with a short explanation, and your score is tracked at the bottom of the screen. This set has 18 questions.
Topics covered in this set
- Number system conversions and 2's complement
- Overflow in signed arithmetic
- IEEE 754 single precision
- Booth's multiplication algorithm
- Instruction formats and expanding opcodes
- Addressing modes, RISC vs CISC and control units
Computer organization MCQs with answers and explanations
Q1. What is the decimal value of the binary number 10110.101?
a) 22.625
b) 22.525
c) 26.625
d) 22.375
Q2. What is the range of integers that can be represented in 8-bit 2's complement form?
a) -127 to +127
b) -128 to +127
c) -128 to +128
d) 0 to 255
Q3. The hexadecimal number 3AF is equal to which octal number?
a) 1757
b) 1537
c) 1657
d) 1656
Q4. What is the 8-bit 2's complement of 01011000?
a) 10100111
b) 10101001
c) 11011000
d) 10101000
Q5. When two signed numbers are added in 2's complement, overflow is detected when:
a) There is a carry out of the most significant bit
b) Both operands are negative
c) The carry into the sign bit differs from the carry out of the sign bit
d) The result is zero
Q6. In 8-bit 2's complement arithmetic, 01100100 + 00110010 is computed. What is the 8-bit result and does overflow occur?
a) 10010110, overflow occurs
b) 10010110, no overflow
c) 01001011, no overflow
d) 00010110, overflow occurs
Q7. In IEEE 754 single precision format, how many bits are used for the exponent and what is the exponent bias?
a) 11 exponent bits, bias 1023
b) 8 exponent bits, bias 128
c) 7 exponent bits, bias 63
d) 8 exponent bits, bias 127
Q8. What is the IEEE 754 single precision representation of -6.5 in hexadecimal?
a) 40D00000
b) C0D00000
c) C0B00000
d) C1500000
Q9. In Booth's multiplication algorithm, if the current bit pair (Q0, Q-1) is (1, 0), the step performed is:
a) Add multiplicand to A, then arithmetic shift right
b) Subtract multiplicand from A, then arithmetic shift right
c) Only arithmetic shift right
d) Subtract multiplicand from A, then logical shift left
Q10. For an 8-bit multiplier, which value makes Booth's algorithm perform the maximum number of additions and subtractions?
a) 11111111
b) 11110000
c) 01010101
d) 00000000
Q11. Zero-address instructions (such as ADD with no explicit operands) are characteristic of which type of machine?
a) Stack-based machines
b) Accumulator-based machines
c) Load-store (register-register) machines
d) Memory-to-memory machines
Q12. A processor uses 24-bit instructions with three fields: opcode, a register field (32 general-purpose registers) and a direct memory address for a 64K-word memory. What is the maximum number of distinct opcodes?
a) 32
b) 16
c) 4
d) 8
Q13. A machine has 16-bit instructions and 6-bit address fields. It supports 14 two-address instructions and only one-address instructions otherwise, using an expanding opcode. What is the maximum number of one-address instructions?
a) 64
b) 128
c) 192
d) 256
Q14. In which addressing mode is the operand value itself contained in the instruction?
a) Direct
b) Register indirect
c) Immediate
d) Indexed
Q15. With memory indirect addressing, how many memory accesses are needed to obtain the operand after the instruction has been fetched?
a) 0
b) 3
c) 1
d) 2
Q16. In a byte-addressable machine, a 4-byte branch instruction using PC-relative addressing is stored at address 1000 and has an offset of +20. If the PC already points to the next instruction when the address is computed, what is the branch target address?
a) 1024
b) 1020
c) 1004
d) 1016
Q17. Which of the following is a typical characteristic of a RISC processor?
a) Variable-length instructions with many complex addressing modes
b) Load-store architecture with fixed-length instructions and a large register set
c) Arithmetic instructions that operate directly on memory operands
d) Heavy reliance on microprogrammed control for complex instructions
Q18. Which statement correctly compares hardwired and microprogrammed control units?
a) Hardwired control is easier to modify when new instructions are added
b) Microprogrammed control generally runs faster than hardwired control
c) Microprogrammed control stores control signals as microinstructions in a control memory, making it flexible but usually slower
d) Hardwired control requires a control memory to store microinstructions
Quick revision notes
- n-bit 2's complement range: -2^(n-1) to 2^(n-1) - 1; 1's complement and sign-magnitude have two zeros.
- Overflow in signed addition: carry into MSB XOR carry out of MSB = 1, or two same-sign operands give an opposite-sign result.
- IEEE 754 single: 1 sign, 8 exponent (bias 127), 23 fraction bits; double: 1, 11 (bias 1023), 52.
- Booth: 10 -> subtract M, 01 -> add M, 00/11 -> shift only; always arithmetic right shift.
- Expanding opcode: leftover opcode patterns x 2^(freed bits) = number of instructions at the next level.
- Memory refs for operand: immediate 0, register 0, direct 1, register indirect 1, memory indirect 2.
- PC-relative EA = updated PC + offset; indexed EA = address field + index register.
- RISC: load-store, fixed-length, hardwired control; CISC: complex modes, variable length, often microprogrammed.
Frequently asked questions
Why is 2's complement preferred over 1's complement for signed numbers?
2's complement has a single representation for zero and lets the same adder hardware handle both addition and subtraction without an end-around carry. It also gives one extra negative value, so 8 bits cover -128 to +127.
How do I quickly convert a decimal number to IEEE 754 single precision?
Convert the number to binary, normalise it to the form 1.xxx x 2^e, then store the sign bit, e + 127 as the 8-bit exponent and the bits after the leading 1 as the 23-bit fraction. Group the 32 bits into nibbles to write the hex form.
What is the difference between direct and indirect addressing?
In direct addressing the instruction holds the operand's memory address, so one memory access fetches the operand. In indirect addressing the instruction holds the address of a location that contains the operand's address, so two accesses are needed, which is slower but useful for pointers.
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